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Message par adammuelta » 17 oct. 2018, 16:04

Ping Pong scheme uses semaphores to pass dual port memory statements

The dual-port memory is efficient for use in embedded systems so long as it is used correctly. Dual-port random access memory (RAM) is outfitted with internal semaphores to help processors write and read to the dual-port RAM. On the other hand, the usage of a strategy that will ensure the safe passage of data from 1 processor to another can be vital. The ping pong scheme uses three of the usual eight hardware semaphores and the 2 processors can have differing speed and power. The strategy allows a privilege to openly pass back and forth between the processors.

Numerous schemes for passing information between chips and dual-port memory are possible. But a ping pong scheme uses only three semaphores, uses no state data within the dual-port memorycard, and does not rely on time.

During the past couple of years, the price of dual-port memory has fallen to a level that makes it possible to be used in embedded systems. Using a dual-port RAM sounds appealing, but you must know how to use this RAM properly. The two processors, one on each side of this dual-port RAM, cannot just read and write into the dual-port RAM at any moment. To assist the designers handle this problem, many dual-port RAMs have internal semaphores. Semaphores are flags that just 1 chip at a time may have best ping pong table pingpongstart.

These semaphores are just fundamental building blocks. You must also implement a strategy that permits information to safely pass from 1 processor to the other. A number of schemes are possible. In one plot, the dual-port RAM itself could hold a state variable for use throughout the chips' arbitration. Another scheme is to guarantee that another chip reads and modifies the information within a tight time limit.

But a third possible strategy uses no state data within the dual-port RAM region and doesn't rely on time. This scheme uses three of the normal eight components semaphores, and the 2 chips can differ in processing speed and power. The processors on each side pass through simple state machines with only one possible next state. This"ping pong" strategy lets a privilege always return and forth between the chips.

Ping pong scheme passes privileges

This strategy describes a privilege that moves between the chips. A processor can hold the privilege provided that it wants to. When a processor has the privilege, the processor is free to do anything it needs with the buffers. The scheme uses three semaphores (A, B, and C) to maneuver the privilege. Figure 2 displays a whole privilege-passing sequence.

Each processor has the privilege three times, resulting in no more than six synchronous transmissions. A processor that owns two semaphores has the privilege. The chip that wants to pass the privilege to the other chip does so by alerting the oldest owned semaphore.


You can use any register- or - protocol-based strategy to translate the buffers, also you can or can't overwrite data. Also, the plot protects any number of buffers. The strategy is fast, because a processor has only to spare one semaphore and survey for another between any communication.The communicating does not deadlock, since the scheme acquires and releases the semaphores in proper order.

This simple solution wasn't easy to derive. You cannot use one semaphore alone, because it merely protects the information and provides no synchronization or management indication. At a single-semaphore scheme, any processor, including the chip that just released a semaphore, could obtain and receive a published semaphore. In the same way, you can't implement the communication with only two semaphores. But a strategy with three semaphores doesn't let a chip acquire and then release the identical semaphore, acquire any 2 semaphores after each other, or launch any two semaphores after each other. The sequence of chip 1 is"free-get-free-get-free-get" of semaphores B, A, and C.

You must assure power-up consistency between the 2 processors. You can accomplish that with a simultaneous obtain of the needed semaphores and a time-out before the sequence begins find best ping pong paddle online.

The following analogy helps to explain the scheme. Consider two individuals wanting to share with an ice-cream . They could utilize three balls to assist them talk about it, 1 red, 1 blue, and one green, all initially lying on a desk. They have to agree on the ball color sequence (r-b-g-r-b-g, etc), and that receives the first lick. Whoever stinks the ice-cream cone should hold two balls.

A simulation example

The following Occam program simulates this ping pong plot (Occam is a registered trademark of SGS-Thomson Microelectronics, previously, Inmos.) Occam-2 is a language that supports parallel procedures, which makes the real-time scheduler invisible and unreachable. The strongly typed language includes a set of rules which, with all the lack of pointers and dynamic memory handling, make programming virtually fool-proof. This terminology is small and easy to learn. Like the real time parts of Ada, Occam-2 is based on the CSP-notation (Communicating Sequential Processes, an official theory developed by CAR Hoare). The next is the most important part of the program:

The code list is folded. All the bold-faced text traces beginning with three dots are all folds. This fold crease reproduces as a heading in the place where the contents of the fold are present. Occam uses strict indenting of 2 spaces to define blocks of code.

A single INT, whose liberty to get moves between the two processors, simulates the dual-port RAM's data space. Occam supports channels (using the CHAN construct) and protocols (utilizing the PROTOCOL build ). All communication between parallel processes (using the PAR build ) occurs over synchronous, unbuffered, unidirectional stations. Occam doesn't have semaphores, because process encapsulation in servers share resources. Still, the purpose of this program is to simulate a common buffer and semaphores. Thus, to create the shared buffer, then you need to break an Occam rule with the #PRAGMA SHARED compiler directive.

Figure 3 displays a command-flow diagram of the principal application listing. Each processor communicates with the dual-port RAM via three control stations (one per semaphore), and the RAM answers over three reply stations (one for each semaphore). This strategy corresponds to having a separate address for each query to some real dual-port RAM. This code defines the Occam protocols:


Both are easy protocols, but Occam also supports version protocols, which are user-defined protocol formats. The following code shows the timing Part of Occam.

TIMER is a primitive data type, and the basic unit is a tick (1 [[micro]sec] on high-priority processes and 64 [[micro]sec] on low-priority procedures ). This procedure is essential for the discretionary time delay.

The DualPortRam code is as follows: PingpongStart

The most interesting factor in this code is the CHAN parameters. Both command and reply are 2-D arrays of stations. The measurements represent the two chips and three semaphores. The Occam compiler guarantees that there's only one sender and one receiver per station.

This code handles the processor questions. Observe that the question mark (?) Passively waits for data on a station, along with the exclamation mark (!) Sends data over a station whenever a receiver is ready for the information:

The above code implements a typical server, one which sits idly awaiting a control coming from any processor (PRI ALT p=0 FOR NoOfProcessors) and moving to some semaphore (PRI ALT s=0 FOR NoOfSema). The code actually implements awaiting six channels (2x3). The following command sets up six times: control [NextALT[p+processor]][s]? cmd. The code processes the first received control. If the semaphore is currently in use, the DualPortRam answers a denial. If the semaphore is free, the DualPortRam grants the semaphore and relocks it. The DualPortRam does not know which processor is utilizing the semaphore; it knows just the binary country. Note that decimal points in Occam names imply merely an underscore in C titles. For instance,"reply" and"reply." Are two different names.

Whenever one chip has been served, the other chip is placed first in the ALT queue of passive waiting. Without this explicit control of the ALT equity, you must introduce a delay from the chips, so that they can not immediately ask again for a semaphore. This replicate query would lead to the releasing semaphore query to not be served. With the acceptable scheduling, the processors don't require this delay. No good system layout should rely on added repeated delays.

The next code asks for another semaphore. In the event the DualPortRam denies, the code moves to a waiting mode. This waiting is unnecessary. However, you can look upon this time as time when the chip can do things apart from ping pong the information back and forth.

As you can see in this code, 1 processor has the time to function as dual-port RAM once/sec; another, 10 times/sec. This usually means that the fastest chip will perform nine questions using a refusal for each success. Full speed with no delay causes the buffer value to increment to 10,000 in 3 sec, including the first 1-sec delay.

Every time a processor owns two semaphores, the chip can do anything it wants with the buffer. A system could manage several buffers through this three-semaphore scheme and may also assign directions to the semaphores. With three buffers, there could be one semaphore for each management (for command/reply) and one for bidirectional data (register-based). Our evaluation program tests to see if another chip has incremented the buffer's value by 1 and then increments the value and sends it to.

Figure 4, which reveals adjoining Processor and DualPort-Ram code, exemplifies some of the communication components.

Each of the code is complete, is completely analyzed, and is functioning. (Code to report to the screen was stripped off) The Occam code has been tested within an SGS-Thomson transputer PC plugin board. Occam is currently also available to nontransputer users. A system called SPOC (Southampton Portable Occam Compiler) creates ANSI-C. Also, a compiler called KROC (Kent Retargetable Occam Compiler) now produces code which runs on a Digital Equipment Alpha running OSF 3.0 along with a SPARC running SunOS/Solaris system. You can even conduct Occam on PCs under a DOS extender. For further information, try the following www websites:

Oyvind Teig is a senior development engineer at Autronica As (Trondheim, Norway). He operates on the design and programming of both real-time systems and retains an MSC degree from the Norwegian Institute of Technology.
Modifié en dernier par adammuelta le 02 nov. 2018, 15:55, modifié 1 fois.

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Message par Nostressleia » 17 oct. 2018, 17:05

Bienvenu sur le forum 8)
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